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The objective of this research is to explore novel methods of carrying out key circuit functions of wireless communication systems, and to investigate novel IC technologies for their implementation. The research scope is broad, encompassing the areas of low noise amplifiers, mixers, frequency synthesizers, power amplifiers, A/D converters, and analog and digital filters. Various IC technologies are explored, including CMOS, Si bipolar, III-V FET and heterojunction bipolar transistor technology. Specific projects include the following.
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| A) |
Power Amplifier Development
We shall explore the efficiency and linearity of power amplifiers based on GaAs HBT technology and on CMOS technology. To improve efficiency, nonlinear classes of amplifier operation will be studied, and are to be achieved using waveform shaping by harmonic tuning in the output and interstage matching networks. We will examine the tradeoffs of efficiency and linearity, for different modulation formats. We will also explore novel techniques to maintain adequate linearity through adaptive predistortion. On a long term basis, we will seek to develop power amplifiers controlled continuously to optimize performance in accordance with signals to be transmitted, as well as temperature, aging, output match, etc. The overall structure will become a "smart power amplifier" which makes use of low cost signal processing circuitry now available, potentially integrated on the power amplifier chip.
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| B) |
RF Circuits Based on CMOS
While Si bipolar and GaAs technologies have to date been most often used in rf circuits, CMOS transistors have been rapidly improving. In conjunction with NRaD, we have been developing microwave nMOS and pMOS devices based on Silicon-on-Sapphire technology. NRaD-fabricated MOSFETs have attained fmax = 66GHz, corresponding to large amounts of available gain at microwave frequencies. We are designing a series of rf circuits based on this technology to demonstrate the potential of CMOS in rf functions. One example is that of an nMOS distributed amplifier, presently under fabrication, simulated to have a bandwidth of 0.5GHz to 17GHz. Switches, low noise amplifiers, power amplifiers and mixers are also being investigated.
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| C) |
Modeling of Devices and Passive Elements
To enable the design of high efficiency, high linearity circuits (particularly at low power supply voltage), accurate models of transistors are required. We shall develop models for the performance of CMOS on sapphire devices at microwave frequencies, and for the behavior of GaAs HBTs. We have already studied the performance of passive elements (inductors and capacitors) in bulk silicon and SOS technology.
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| D) |
Bandpass Delta-Sigma A/D Converters
Advanced A/D converters will enable new radio architectures in which progressively greater amounts of signal processing are carried out in the digital domain. We shall explore novel A/D designs in which signals at 800MHz (i.e. rf signals) are directly digitized, using a delta-sigma modulator sampling at a 3.2GHz rate. The circuit shall be implemented in GaAs HBT technology.
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| E) |
Noise in Voltage Controlled Oscillators
Frequency synthesis with phase-locked-loops based on voltage controlled oscillators is frequently used in wireless systems. In the PLLs, the phase noise of the VCO can be a critical issue. We shall explore ways to simulate VCO noise, and methods to design for minimum noise. The chief demonstration vehicle at present is a 10GHz oscillator based on HBT technology.
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| F) |
Analog Filters
Presently, passive filters constitute a major cost- and size-determining portion of a wireless system rf front-end. We will investigate techniques for realizing the analog filtering functions in IC technology, and examining the resulting compromises in Q, noise figure, dynamic range, efficiency, and frequency accuracy.
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Professor Peter Asbeck instructs Pin-Fan Chen in the low-power RF laboratory
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